Many modem devices contain electronic components employing integrated circuits composed of multiple layers deposited on a substrate. The multiple layers, combined with the usually surficial semi-conducting properties of the substrate, provide different electrical and physical properties, and their orientations relative to one another provide circuit logic.
The process of constructing a multilayer integrated circuit can comprise numerous steps. Often, a semiconducting bulk or “die” is used as a starting point. This die, often Silicon crystal, but sometimes Gallium Arsenide, Germanium or another semiconducting substance, is then “doped” with small amounts of impurities to increase conductance. Different surface regions of the die may be oppositely (in the sense of charge donating or accepting impurities) doped, to create the underlying elements of a transistor. The spatial arrangement of doped regions on the surface may be accomplished through the masking of doping agents or the post-doping etching of a die surface layer.
Numerous other layers may be applied to such an integrated circuit, including gate electrode layers for transistor activation, conducting layers to carry electric signals, insulating layers to isolate components or provide resistance, passivation layers to chemically protect components, and physical layers to give a circuit desired mechanical properties. These layers may have different horizontal arrangements, and can generally be added through processes of deposition, masking and/or etching.
At times, however, some of the steps,to produce a multi-layered integrated circuit can interfere with components created in other steps. For example, chemical etching steps may use electrochemical reactions that interfere with the electrical properties of other layers, or cause chemical decomposition in other layers. These side-effects can be difficult to design around, requiring otherwise unnecessary manufacturing steps and generally increasing costs. The sources of these side effects are often unknown.